Field of the Invention
The technology disclosed in this specification relates to an evaluation apparatus for a semiconductor device and an evaluation method for a semiconductor device, and relates to, for example, an evaluation apparatus for a semiconductor device and an evaluation method for a semiconductor device for evaluating an electrical characteristic of a semiconductor device by using a plurality of probes.
Description of the Background Art
When an electrical characteristic of a semiconductor device which is in a state of a semiconductor wafer or a state of a semiconductor chip is measured, a method for bringing a single surface of the semiconductor device into contact with a surface of a chuck stage to fix the surface by vacuum suction is generally used.
In a vertical semiconductor device that flows a current in the vertical direction of the semiconductor device, that is, in the out-of-plane direction, the surface of the chuck stage, to which the single surface of the semiconductor device is fixed, becomes one of measuring electrodes. Therefore, adhesion between the semiconductor device and the surface of the chuck stage influences contact resistance, which consequently influences the electrical characteristic of the semiconductor device.
As a factor that causes deterioration of the adhesion between the semiconductor device and the surface of the chuck stage, a case where a foreign substance which is often brought along with the semiconductor device is sandwiched between the semiconductor device and the surface of the chuck stage, or a case where the deterioration is caused by flatness of the semiconductor device itself, for example, a case where the semiconductor wafer is warped, is assumed.
In the case where a foreign substance is sandwiched between the semiconductor device and the surface of the chuck stage, the sandwiched foreign substance influences the electrical characteristic of the semiconductor device. In addition to this, in the case where a foreign substance is sandwiched between the semiconductor device and the surface of the chuck stage, defects such as cracks may occur at a part, in contact with the foreign substance, of the semiconductor device, or in the vicinity of the part, in contact with the foreign substance, of the semiconductor device, and a part of the semiconductor device may be damaged.
For example, Japanese Patent Application Laid-Open No. 05-333098 discloses an evaluation apparatus that reduces a measurement error of an electrode potential that results from a difference of the flatness of the semiconductor wafer.
The evaluation apparatus disclosed in Japanese Patent Application Laid-Open No. 05-333098 includes probe electrodes corresponding to the number of individual power semiconductor elements in a semiconductor wafer support base, so that it is possible to suppress dispersion in horizontal relative distances between the respective power semiconductor elements and the corresponding probe electrodes, and to reduce an measurement error. The probe electrodes are connected to the evaluation apparatus through a selection switch group that is on/off-controlled.
However, the probe electrodes in the semiconductor wafer support base disclosed in Japanese Patent Application Laid-Open No. 05-333098 cannot correspond the warp of the semiconductor wafer, or the foreign substance.